1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more specifically, to a programmable logic device (PLD) having an input transition detector (ITD) circuit.
2. Description of the Related Art
A PLD is a logic LSI circuit manufactured by utilizing the fact that a logic circuit can be set up by the AND-OR logic. The PLD has a programmable product term line and a programmable sum term line, and the user can set up, by programming, an arbitrary logic circuit in a chip. More specifically, an arbitrary logic output can be obtained from an output pin in accordance with an input signal supplied from an input pin, and if necessary, the logic output can be fed back to be used also as an input signal of the product term line. In the PLD, memory elements such as EPROM and E.sup.2 PROM are used for constituting an arbitrary logic circuit, and a sense amplifier circuit for amplifying an output from the memory elements is provided.
In the meantime, for the purpose of energy-saving of the sense amplifier circuit, there is provided a technique to render the sense amplifier circuit in an enable state only during the period in which a pulse signal having a constant width is output. In order to realize such an operation, an ITD circuit is used. The ITD circuit generates a pulse signal having a constant width upon detection of a variance of the input signal supplied from the input pin. In response to the pulse signal, the sense amplifier is set in the enable state. The PLD having such an ITD circuit is disclosed in, for example, "32ND MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS", University of Illinois at Urbana-Champaign, Aug. 14-16, 1989, pp. 1062-1065, "LOW-POWER CONSUMPTION AND LOW-VOLTAGE OPERATION PLA(L.sup.2 -PLA) USING 1.2 .mu.m DOUBLE POLY-SILICON CMOS E.sup.2 PROM TECHNOLOGY", Saeki et al.
However, according to the structure disclosed in the preprint of the thesis, a pulse signal is generated upon detection of a change of a signal output from the output pin or the input/output pin, and therefore the pulse signal is generated even in the case where the output signal of the sense amplifier circuit is not used as being fed back to the AND array, thus setting the sense amplifier circuit in an enable state. As a result, an electrical current is consumed even in the case where it is not necessary to set the sense amplifier circuit in the enable state.